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Cortex-A9 core registers

In RTL code of A9mp platform provided by ARM, I see that almost all registers are renamed and are out of order(There are registers named R0-R55). This make it quite difficult for me to debug some problems.

So how can I match them with R0-R14, especially for  SP and LR ?

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  • So how can I match them with R0-R14, especially for  SP and LR ?

    In general what gets sent over the JTAG interface is designed to match the architectural state - so for most software debug I would recommend using the debug interface, it is less likely to drive you crazy =)

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  • So how can I match them with R0-R14, especially for  SP and LR ?

    In general what gets sent over the JTAG interface is designed to match the architectural state - so for most software debug I would recommend using the debug interface, it is less likely to drive you crazy =)

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