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Translation error at level1 in armv8 A72 cortex

Hi,

I am trying to enable MMU on LS1046ARDB using baremetal boot code . We are translating 1GB of DRAM as NORMAL READ WRITE memory . We are able to load entries into translation tables successfully . But as soon as MMU is enabled the execution is crashing and we are getting translation error at level 1 indicated in IFSC Field of ESR_EL3 Register.(Error code : 0x86000005)

Attached below is the assembly code we are using to set up Translation tables and enable MMU.

Are we missing anything? Any suggestions would be appreciated.

 

Thanks,

Faizanbaig Inamdar

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