Hello,
I'm trying to get MMU working on Cortex-A53. But still fails since at least 3 days. :(
I created following tables:
Level 1
0 0000000010006003 1 0000000010007003 2 0000000010008003 3 0000000010009003 4 000000001000a003 5 0000000000000000 [...] 511 0000000000000000
Level 2
Table 0 @ 0x10006000 (DDR RAM)
0 0000000000000701 1 0000000000200701 [...] 510 000000003fc00701 511 000000003fe00701
Table 1 @ 0x10007000 (DDR RAM)
0 0000000040000701 1 0000000040200701 [...] 510 000000007fc00701 511 000000007fe00701
Table 2 @ 0x10008000T (DDR RAM)
0 0000000080000701 1 0000000080200701 [...] 510 00000000bfc00701 511 00000000bfe00701
Table 3 @ 0x10009000 (DDR RAM)
0 00000000c0000701 1 00000000c0200701 [...] 503 00000000fee00701 504 0000000000000000 [...] 511 0000000000000000
Table 3 @ 0x1000a000 (Memory-Mapped Devices)
0 00000000ff000705 1 00000000ff200705 [...] 7 00000000ffe00705 8 0000000000000000 [...] 511 0000000000000000
The relevant setup for setup the pagetable:
ldr x1, =0x3519 msr TCR_EL2, x1 mov x1, 0x00FF msr MAIR_EL2, x1 ldr x1, =_tlb_el2_tbb0_lv1 msr TTBR0_EL2, x1 mov x8, xzr dsb sy ret
The relevant code for enabling the MMU:
__el2_cache: mrs x0, SCTLR_EL2 bic x0, x0, #(1 << 0) /* Disable MMU */ bic x0, x0, #(1 << 2) /* Disable D-Cache */ bic x0, x0, #(1 << 12) /* Disable I-Cache */ msr SCTLR_EL2, x0 isb /* Invalidate and clean I/D-Cache */ bl _cpu_icache_invalidate bl _cpu_dcache_l1_invalidate bl _cpu_dcache_l2_invalidate __el2_pagetable: /* Create pagetable for EL2 */ bl _cpu_el2_tlb_create /* Invalidate (old) Pagetable */ tlbi ALLE2 dsb sy isb mrs x0, SCTLR_EL2 orr x0, x0, #(1 << 0) /* Enable MMU */ orr x0, x0, #(1 << 2) /* Enable D-Cache */ orr x0, x0, #(1 << 12) /* Enable I-Cache */ msr SCTLR_EL2, x0 isb nop nop nop nop
I'm using U-Boot as bootloader (starting at EL2).
Have I something misunderstood? Have also tried several configurations. But still fails.