I am trying to track down a hard to find issue on a Cortex-M4. Leading to a lot of single stepping.
I have noticed that the CPU does not seem to process interrupts as expected when single stepping.
E.g.
Currently the CPU core has PRIMASK = 0 and ICSR=0x10C4A000
Indicating that both a ISR is pending and PENDSV is pending and interrupts are globally enabled.
But further single stepping does not cause the CPU to enter any handler. It just runs through the normal instruction flow.
Interrestingly enough VECTPENDING is 0xA which is a reserved interrupt according to technical documents from ARM.
I have checked DHCSR and C_MASKINTS is cleared, so it should process interrupts as normal.
The PendSV handler not beeing entered is of course a huge problem as the causes the embedded OS to malfunction.
(Task switching not running at all, all points in which a task should go to sleep are ignored etc)