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Cortex R5 Application Execution

Kalyan Vagvala

Hello Team,

I have a test code to configure few peripherals with Cache enable and the test code triggers a event. when i test the code i had to keep a for loop of count 500000 (i.e. some delay ) before triggering the event.

I suspected the the memory operations might not be performed  prior to triggering the event and used DMB and DSB instructions instead of delay but i still have to keep the delay to successfully test the code.

Can you please help me in resolving this issue? is there any way to make sure all the memory transactions are complete?

Please advice.

Thanks,

Kalyan