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A55 cache lock

summer123

hi,

could you tell me whether cortex-A55 support cache lock function?

which cache support it, L1 or L2 or L3 or all of them?

THANKS

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  • 0

    Hi ,

    As i could read on some forum, it's depend on some board's timer definition. You must be sure of using the common one. The Arch timer definition (A55 definition in your case) in place of the board's one.

    In some case, this is locking some cache function.

    could we have some information about your environement.

    Regards

Reply
  • 0

    Hi ,

    As i could read on some forum, it's depend on some board's timer definition. You must be sure of using the common one. The Arch timer definition (A55 definition in your case) in place of the board's one.

    In some case, this is locking some cache function.

    could we have some information about your environement.

    Regards

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