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Hello.
I would like to ask if it is possible to read the PMU of core0 from core1.
So far i have work with an one core CPU and i use the MRS, MSR instructions to set the PMU.
How to enable the PMUs for each core?
Also, i read the PMUs are memory mapped so i suppose there is a way to read them from another core.
Could someone provide me some information on how to do it with memory mapped or if there is a simple way.
Thank you
I check the TPM ans ome answers in the forum already but i am confused if it is possible to access the PMUs of another core using another core, i.e pmu of core0 using core1.
From the manual i attach the following:
Table 11-28 shows the offsets from the physical base address of the ROM table
Offset Name Type Description
0x008 ROMENTRY2 RO Core 0 PMU
The Physical Address of a debug component is determined by shifting the address offset 12places to the left and adding the result to the Physical Address of the Cortex-A53 processorROM Table.
Table 11-30 v8 ROMENTRY values
Name Debug component Offset value ROMENTRY value
ROMENTRY2 Core 0 PMU 0x00030 0x00030003
Table 12-15 Memory-mapped PMU register summary
0x400 PMEVTYPER0_EL0 RW Performance Monitor Event Type Register
With this information how can i access PMEVTYPER0_EL0 of core0PMU from core1?
Thank you very much
Nikos Pol said:I check the TPM ans ome answers in the forum already but i am confused if it is possible to access the PMUs of another core using another core, i.e pmu of core0 using core1.
Did you try it and it did not work? Or didn't you try at all?
No i dint try yet. I experiment by using the pmu in one core and it works. I wanted to verify first if it is possible. I read that the cpu must be in debug state to do this but in the TPM it dont says anything like this.
You are kidding? Before asking, you should try,