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Data abort exception for unaligned access in Cortex A55

Harshit

Hi,

I have written a simple assembly code in Cortex A55, which executes in EL3, 64-bit execution state. In the code, the cache and MMU is disabled which means that any memory accessed will be treated as device memory.

There is a bit in SCTLR_EL3.A to disable the fault alignment for unaligned memory accesses. But in spite of that i am observing an exception getting triggered as Synchronous Current EL with SP_EL0”. 

                    R X0 00000000201ffed0

     166140 tic ES  (00000000000011c8:f81e401f) O el3t_s:         STUR     xzr,[x0,#-0x1c]

                    EXC [0x000] Synchronous Current EL with SP_EL0

                    ST 00000000201ffeb0 ........ ######## ######## ........    S:00201ffeb0    nGnRnE OSH

                    R ESR_EL3 0000000096000061

                    R FAR_EL3 00000000201ffeb4

                    R CPSR 800003cd

                    R SPSR_EL3 000000008000020c

                    R ELR_EL3 00000000000011c8

Can you please let me know how do i disable this without enabling the MMU ?

Thanks,

Harshit