Early Burst Termination with IDLE transfer in Multi-Layer AHB Lite

Hi,

We are designing an Asynch slave operating over Multi Layer AHB Lite 3.0.

I have come across some case which I am not sure how it should be handled.

I am getting a predefined burst INCR16 , and the following occurs : 

Cycle     :          1          |       2      |       3      |        4     |       5      |  ...

HBURST:   INCR16      | INCR16 | NA         | INCR16 | INCR16  |  ...

HSELS  :          1          |       1       |       0     |        1     |        1      | ...

HTRANS:    NONSEQ |     SEQ    |    IDLE  |     SEQ  |      SEQ   | ...

Actually, I get early burst termination using IDLE transfer in cycle #3, however, I am not sure whether this is a legal state to return to sequential transfer with predefined burst after that, or should the master re-start with nonseq transfer of undefined length ? 

What is the expected behavior a slave would see in case in early termination with IDLE Transfer ? 

Thanks,

Guy