where can I find the detailed explanation of ARM PMU events?

Hello alexamy,

The PMU is an ARM Architectural Extension so you will have detailed explanations in the ARM Architecture Reference Manual; in particular, Chapter D5 "The Performance Monitors Extension" in the ARM v8-A ARM. Section D5.10 describes some of the architecturally-defined events, of which event 0x001 (L1I_CACHE_REFILL) can be used to count level 1 instruction cache refills.

Normally, you may find implementation-specific information about PMUs in the Technical Reference Manual for a given processor, for example for the Cortex-A57 PMU.

-Duberly

Hello alexamy,

The PMU is an ARM Architectural Extension so you will have detailed explanations in the ARM Architecture Reference Manual; in particular, Chapter D5 "The Performance Monitors Extension" in the ARM v8-A ARM. Section D5.10 describes some of the architecturally-defined events, of which event 0x001 (L1I_CACHE_REFILL) can be used to count level 1 instruction cache refills.

Normally, you may find implementation-specific information about PMUs in the Technical Reference Manual for a given processor, for example for the Cortex-A57 PMU.

-Duberly

Hi dmazuelos,

Thanks for your reply.

As to the second question: how to know the stall cycles for e.g. icache miss?  Take event 0x001 (Level 1 instruction cache refill) as example, can I know the percentage of event 0x001 within one time duration (for example 5s)? Or can I know how many cycles are occupied by event 0x001 with that time duration?

Thanks.

-Alex

Hi Alex,

the PMU measures the number of every event. So you cannot get the event cycles but get event percentage.

Best regards,

Yasuhiko Koumoto.