HI there:
i am developing on a ARMv8 a57 based CPU, i want to disable the cache mechanism. it seems i need the access the corresponding registers in EL1 or above.
i wonder how could i switch the EL cause i failed to modify the registers in the current EL(EL0).
Moving thread to the "Cortex-A / A-Profile" category [1].
[1]: community.arm.com/.../cortex-a-forum