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Users of Arm processors can be all over the planet, and now they have a place to come together. The processors community is the place to be all things processor-related.
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Unanswered questions
arm1176jzf-s fiq context switch
Suggested Answer
8 days ago
A72 not handling IRQ properly
Not Answered
3 days ago
Disable data prefetching in a Cortex-A53 running Android
Answered
1 month ago
When the generic timer starts to tick?
Not Answered
8 days ago
How to determine which core is generating the AXI read transaction in a multi core processor?
Answered
11 days ago
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arm1176jzf-s fiq context switch
0
374
views
1
reply
Latest
3 days ago
by
Peter Rielly
Not Answered
A72 not handling IRQ properly
0
Cortex-A72
Interrupt Handling
237
views
0
replies
Started
3 days ago
by
MNB
Answered
Disable data prefetching in a Cortex-A53 running Android
+1
Cortex-A53
EL1
L1
L2
936
views
6
replies
Latest
8 days ago
by
DNovo
Not Answered
When the generic timer starts to tick?
0
267
views
0
replies
Started
8 days ago
by
rzsz
Answered
How to determine which core is generating the AXI read transaction in a multi core processor?
0
Cortex-A72
690
views
3
replies
Latest
9 days ago
by
MNB
Answered
ARM Cortex A5 -Issue: Undefined Instruction when write/read value of CNTFRQ register in core ARMv7
0
637
views
2
replies
Latest
9 days ago
by
Khuong Nguyen
Not Answered
Page Table Indexing using Virtual Address bits
0
382
views
1
reply
Latest
14 days ago
by
42Bastian Schick
Suggested Answer
translational table : block and table descriptor
0
525
views
2
replies
Latest
14 days ago
by
Amitra29877
Not Answered
RK3399: how to configure Compute Library to use specific cores
0
Cortex-A53
496
views
2
replies
Latest
19 days ago
by
vstehle
Not Answered
ARM board with SDI input
0
274
views
0
replies
Started
22 days ago
by
Lawson
Not Answered
Why A15 I-cache use PIPT while other series use VIPT
0
292
views
0
replies
Started
24 days ago
by
haooo
Suggested Answer
Cortex-A7 cache line size
0
489
views
2
replies
Latest
24 days ago
by
haooo
Answered
arm MMU-500 code samples
0
918
views
7
replies
Latest
24 days ago
by
holder25
Not Answered
Switching linker
0
281
views
0
replies
Started
28 days ago
by
brianpl
Not Answered
OPS/core/cycle on A72
0
Cortex-A72
379
views
1
reply
Latest
29 days ago
by
vstehle
Not Answered
Cortex A9 Coresight TMC configuration
0
276
views
0
replies
Started
29 days ago
by
Jan VdH
Not Answered
RTOS for ARM A57(NVIDIA Jetson TX2 / TX2i)
+1
Real Time Operating Systems (RTOS)
Cortex-A57
Linux
454
views
2
replies
Latest
29 days ago
by
mea
Answered
Cortex-A53 processor instruction cycles
0
Cortex-A53
Cortex-A
5742
views
8
replies
Latest
29 days ago
by
42Bastian Schick
Discussion
4-kbyte boundary space
AMBA
AXI4
10639
views
10
replies
Latest
1 month ago
by
Colin Campbell
Answered
Best Microbenchmark package for Arm Cortex-A9
+1
436
views
1
reply
Latest
1 month ago
by
vstehle
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