Hi,
I am university student at my final year and I am doing research on Cortex-M3.
One thing that I found problematic was system bus registration of instruction and vector fetch requests.Only available source of information I found was this paragraph in documentation, but it wasn't descriptive enough.
I am not sure what is registered and when. Is it address, response or maybe both of them?I would be grateful if somebody could point me to more descriptive material.