Parallel Flash Memory to Integrate with CMSDK example

Hello Guys

I am trying to add an external parallel flash Memory with Cortex-M0.  I see that  cmsdk_ahb_to_extmem16.v file uses Lower byte enable and upper byte enable pin to select the bytes in the Memory. I was trying to find the commercially available external parallel flash Memory to integrate with the processor. But could not get. Does anyone know about such flash memory?

I am sharing the interfaces of the file. If you notice the output wires you can get it. Please help me find the appropriate memory. The block diagram can be found here.https://developer.arm.com/docs/ddi0479/c/basic-ahb-lite-components/ahb-to-external-sram-interface .

// Port Definitions
// --------------------------------------------------------------------------
  input  wire          HCLK,    // Clock
  input  wire          HRESETn, // Reset
  input  wire          HSEL,    // Device select
  input  wire [AW-1:0] HADDR,   // Address
  input  wire    [1:0] HTRANS,  // Transfer control
  input  wire    [2:0] HSIZE,   // Transfer size
  input  wire          HWRITE,  // Write control
  input  wire   [31:0] HWDATA,  // Write data
  input  wire          HREADY,  // Transfer phase done
  output wire          HREADYOUT, // Device ready
  output wire   [31:0] HRDATA,  // Read data output
  output wire          HRESP,   // Device response (always OKAY)

  // Static configuration
  input  wire    [2:0] CFGREADCYCLE,    // Read cycles
  input  wire    [2:0] CFGWRITECYCLE,   // Write cycles
  input  wire    [2:0] CFGTURNAROUNDCYCLE,    // Turn around cycles
  input  wire          CFGSIZE, // port size (0=8-bit, 1=16-bit)

  input  wire   [15:0] DATAIN,  // Data input

  output wire [AW-1:0] ADDR,    // Address output
  output wire   [15:0] DATAOUT, // Data output
  output wire          DATAOEn, // Tristate buffer output enable

  output wire          WEn,     // Write Controls
  output wire          OEn,     // Output enable (read)
  output wire          CEn,     // Chip enable
  output wire          LBn,     // Lower byte enable
  output wire          UBn);    // Upper byte enable