I'm working an a project on a Texas Instruments AM3517 Cortex-A8 processor. I was seeing less than expected performance, and did a simple comparison with a Cortex-M3 processor. The M3 performance was more than twice as good as the A8(?!).
The test was a simple count to 100,000:
while (1){ volatile uint32_t i; dbg_PinSet(DBG_PIN_00); for ( i = 0; i < 100000; i++ ) { } dbg_PinClear(DBG_PIN_00);}
This is a bare metal system. Timing was measured with a scope and the debug pin, and found to be about 40 ms on the A8 clocked at 600 MHz, and about 14 ms on the M3 clocked at 72 MHz.
The code on the A8 is running from the on chip 64K ram to remove cache and external memory effects. Interrupts are disabled on both processors.
I'm relatively new to the A8, and suspect I'm missing something simple in setup somewhere.
Any pointers or help will be greatly appreciated.
Thanks,
-Rob
I did some simply testing with only the level 1 cache, and saw some minor variations between combinations of instruction/data cache enabled/disabled. Moving from internal to externally memory cut the performance in half, though. Digging in to the MMU and level 2 cache, and will let you know....
You can't turn on the caches without the MMU turned on (certainly true for the data cache - the instruction cache may do something useful); I would guess the random variation would mostly just be noise in the measurement.
Hi Peter,
regarding the instruction cache, it is able to turn on without MMU, isn't it?
Best regards,Yasuhiko Koumoto.
Yes, I think so.