Hi experts and ARM designers,
I have found "ARM® Cortex®-M7 Processor Technical Reference Manual Revision r0p2" on the ARM site. By reading it I have a question. "Figure 1-3 Cortex-M7 functional diagram" shows all TCM accesses go through TCU. Does this mean CPU cannot access both ITCM and DTCM simultaneously? If it is correct, to locate DATA in DTCM is not useful in the performance view point because such accesses cannot be the Harvard Architecture. Is my understanding correct?
Best regards,Yasuhiko Koumoto.
Hi Joseph,
thank you for your clarification. I was relieved. Cortex-M7 is great.
Best regards,
Yasuhiko Koumoto.