We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
I am trying to program an F407VG manually without using CubeMX and using registers. Could someone please help me get the SPI running? When I look on an oscilloscope, the Slave/Chip select goes low and high correctly but I am writing data to SPI1 DR and I don't see anything on MOSI or SCLK. What have I done wrong? C code below:
/* ENABLING AND CONFIGURING CLOCKS */ RCC->AHB1ENR |= (1<<0); //GPIO config RCC->AHB1ENR |= (1<<4); RCC->APB2ENR |= (1<<12); // SPI_1 Enabled RCC->CR |= (1<<0); // Enable the 16 MHz HSI clock RCC->PLLCFGR |= (0<<22); // Set HSI as source RCC->PLLCFGR |= (1<<1) | (0<<0); // Adjust to use PLL // Set the divider PLL_M to 16 to get 1 MHz since HSI is 16 MHz RCC->PLLCFGR |= (0<<0) | (0<<1) | (0<<2) | (0<<3) | (1<<4) | (0<<5); // SET PLL_N as 288 RCC->PLLCFGR |= (0<<6) | (0<<7) | (0<<8) | (0<<9) | (0<<10) | (1<<11) | (0<<12) | (0<<13) | (1<<14); // Set PLL_P as 4 to get 72 MHz RCC->PLLCFGR |= (1<<16) | (0<<17); // Set APB2 divider to 2 to get 36 MHz RCC->PLLCFGR |= (1<<15) | (0<<14) | (0<<13); /*GPIO PINS*/ //Set PE5 as output for CS, push pull, no pull up/down GPIOE->MODER |= (1<<10); GPIOE->OTYPER |= (0<<5); GPIOE->OSPEEDR |= (1<<10); GPIOE->PUPDR |= (00<<10); GPIOE->BSRR |= (1<<5); // Set PA5 as SCLK using AF5 GPIOA->MODER |= (1<<11); GPIOA->OTYPER |= (0<<5); GPIOA->OSPEEDR |= (1<<10); GPIOA->PUPDR |= (1<<10); GPIOA->AFR[0] |= (1<<22) | (1<<20); // Set PA6 as MISO using AF5 GPIOA->MODER |= (1<<13); GPIOA->OTYPER |= (0<<6); GPIOA->OSPEEDR |= (1<<13); GPIOA->PUPDR |= (1<<12); GPIOA->AFR[0] |= (1<<24) | (1<<26); // Set PA7 as MOSI using AF5 GPIOA->MODER |= (1<<15); GPIOA->OTYPER |= (0<<7); GPIOA->OSPEEDR |= (1<<15); GPIOA->PUPDR |= (1<<14); GPIOA->AFR[0] |= (1<<28) | (1<<30); /* Configure SPI */ /* SPI is set as Master Mode Direction 2 Lines 8-Bit data size Clock polarity low Clock phase 1 Edge Baudrate prescalre of 32 Send the MSB first CRC disabled Software set NSS/CS */ SPI1->CR1 |= (0<<15) | (1<<14) | (0<<13) | (0<<11) | ... (0<<10) | (1<<9) | (0<<7) | (1<<6) | (1<<5) | (0<<4) | ... (0<<3) | (1<<2) | (0<<1) | (0<<0);
When running the code I set the CS pin to low and then write random data to the SPI1 DR like this:GPIOE->BSRR |= (0<<5);Delay by 10000SPI1->DR |= (1<<7) | (1<<2);Delay by 50SPI1->DR |= (0<<7) | (0<<2);Delay by 10000GPIOE->BSRR |= (1<<5);The delay is just a simple counter function. So in summary, I am configuring the HSI to be a source for PLL and then setting the division and multiplication factors such that the output frequency to APB/AHB is 72MHz. SPI1 is on APB2 so after dividing 72MHz by a prescaler of 2, I get 36 MHz as the clock frequency for SPI1 since I have read that SPI1 should be around 36 MHz. I have been through the code and registers again but I cannot find my error. Thank you for your help.