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Does MSR DAIF require ISB instruction? If no, why?

Dear experts,

I see a lot of code in opensource like

.macro disable_daif
     msr     daifset, #0xf
.endm


and it doesn't apply ISB instruction after it. Though I read in ARM manual that:
"context-changing operations
that require the insertion of an ISB instruction to
ensure the effects of the operation are visible to instructions fetched after the ISB instruction are:
• Completed cache and TLB maintenance instructions.
• Changes to system control registers."

AFAIU set new value to daifset is "Changes to system control registers." doesn't it?
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  • Hi ,

    Quoting the Arm v8 Architecture manual C5.1.3:

    "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional synchronization. Changing PSTATE.SPSel to use SP_EL0 synchronizes any updates to SP_EL0 that have been written by an MSR to SP_EL0, without the need for additional synchronization."

Reply
  • Hi ,

    Quoting the Arm v8 Architecture manual C5.1.3:

    "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional synchronization. Changing PSTATE.SPSel to use SP_EL0 synchronizes any updates to SP_EL0 that have been written by an MSR to SP_EL0, without the need for additional synchronization."

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