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I know that when the core is in non secure mode (non TZ), the normal world software is not able to access SCR in cp15.
But I'm wondering what consequence it will cause if such operations occur.
Unexpected results and the core runaway or the operations don't affect and nothing happens?
The expected result in an undef instruction abort.
So you'll jump to offset 0x4 in the non-secure vector table and you can use the value in the LR to identify the failing instruction. If you are running your test under an OS or other setup harness then some code may silently handle the undef for you - but one should defiantly happen!
thanks, that's very helpful~