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Hi there,
I have question regarding handshaking in the AXI protocol.Currently i am designing decorder for AXI4-Lite master .
While doing the write adress transaction, AWVALID depends upon write enable.AWVALID is high when write enable signal is high. AWREADY from slave is default HIGH so transaction happens in one clock. After the completion of transaction , AWVALID check for AWREADY HIGH and sets AWVALID low in next clock.
I am confused if this is the valid way of doing transaction because AXI specs says VALID signal must not depend upon READY signal.
Hi,
>I am confused if this is the valid way of doing transaction because AXI specs says
>VALID signal must not depend upon READY signal.
Yes, this is a valid way.
In your scenario the VALID de-assertion or immediate re-assertion is dependent on the handshake completion, so in that respect it *is* dependent on READY. But that's not what this requirement is for. The requirement is in place to avoid the source only asserting VALID after the destination has used READY to indicate it can complete a future transfer. Then there is the risk of deadlock with the destination (legally) waiting for VALID assertion by the source before asserting READY, and the source (illegally) waiting for READYassertion by the destination before asserting VALID.
So in your scenario I think it is more a case of the master waiting for the HANDSHAKE completion before de-asserting VALID since it has no more addresses to send. In this case VALID is depending on READY being asserted for a PREVIOUS transfer, but not for the transfer the master NEXT wants to perform.
Your scenario is actually looking at VALID and READY dependencies over multiple transfers, not just on one transfer.
I hope that helps.
Xingguang