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Address handshaking in AXI4

Hi  there,

I have question regarding handshaking in the AXI protocol.Currently i am designing  decorder for AXI4-Lite master .

While doing the write adress  transaction, AWVALID  depends upon write enable.AWVALID is high when write enable signal is high. AWREADY  from slave is default HIGH so transaction happens in one clock. After the completion of transaction , AWVALID check for AWREADY HIGH and sets AWVALID low in next clock.


I am confused if this is the valid way of doing transaction because AXI specs says VALID signal must not depend upon READY signal.

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