• State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 1 reply
  • Subscribers 350 subscribers
  • Views 4319 views
  • Users 0 members are here
Options
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How does128Byte WriteLineUnique transaction map to a cache with 64Byte cache line size?

Hanan

Hello,

I have an IP with an ACE-Lite I/F which can issue a 128Byte write transaction with a "WriteLineUnique" type. I  the system there will be a cortex A7 master(64bytes cache line). My question is: in case of such transaction (WriteLineUnique with 128bytes) is the trasaction splitted into 2 cache lines (2X64byte)? Thanks

Hanan

0