hi, experts:
In Cortex-A57 TRM chapter 4.3.66 :
It defines CPUACTLR_EL1 register, but this register name is not CPUACTLR_EL1.
Its name is S3_1_C15_C2_0.
Why?
best wishes,
hi
The CPUACTLR_EL1 (and CPUECTLR_EL1 and CPUMERRSR_EL1) are implementation defined registers.
The ARMv8 architecture defines a number of system registers that a processor must implement (e.g. SCTLR_EL1). It also leaves encoding space for processors specific (or IMP DEF) registers. A processor designer can choose how many IMP DEF registers they want their processor to include, what to use them for and what to call them.
The ARM assembler (armasm) recognizes the name architectural registers. BUT not the IMD DEF registers, for these you have to give the encoding.
hi, Martin:
So, you mean:
S3_<op1>_<Cn>_<Cm>_<op2> register name format has been recognized by ARM assembler.
So, if we use S3_1_C15_C2_0 , not need give the encoding to assembler.
But if we use CPUACTLR_EL1, must give its encodding to assembler, right?
Sort of.
If you wrote "MSR CPUACTLR_EL1, x0" you would get an error, because it's an IMP DEF register and the tools don't recognize the name. Instead what you write is "MSR S3_1_C15_C2_0, x0".
Got it!
Thanks a lot!