hi, experts:
ARM ARM manual introduces a concept PoC and PoU for cache maintanance operations.
Based on Cortex-A7 MPCore TRM and ARM ARM manual, i got below conclusion:
1. PoC points to external DRAM region for CA7 MPCore.
Is it right?
2. PoU points to L1 DCache if BROADCASTINNER is low.
3. What is the difference between PoC and PoU for Cortex-A7 MPCore?
for exampe:
DCCMVAU : DCache clean line to PoU
DCCMVAC : DCache clean line to PoC
They confused me!
I don't know when to use DCCMVAC, when to use DCCMVAU.
best wishes,