This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Setting up IRQ in ARM

Hi everyone

I am new to ARM and really wanted to learn about various aspects of ARM Programming .

I have basic understanding of x86 Assembly.

So,what Specifically I wanted to know is what happens when an external device triggers an interrupt .

Let me put my basic understanding on the same, which I learnt in last few days

Offset Handler
===============
00 Reset
04 Undefined Instruction
08 Supervisor Call (SVC)
0C Prefetch Abort
10 Data Abort
14 (Reserved)
18 Interrupt (IRQ)
1C Fast Interrupt (FIQ)

Whenever Interrupt comes instruction at address 18 is executed

So is it true that it is first instruction executed when interrupts comes??

Or as I read somewhere whenever interrupts comes first it moves from user mode to IRQ mode and cpsr is copied to spsr_IRQ but it happen without an instruction .

After that current instruction is replaced with a blx 0x18

How and where we do need to set the stack for different mode e.g for IRQ mode and Supervisior mode??

In the brancged code


IRQ_HANDLER:

SUB lr, lr, #4

STMFD !sp {r14}

bl IRQ_handler_to_specific_device ;it will branch to actuall hander code.

LDMFD r13!,{r14}
mov pc, r14


Is it all We need to do for setting up Basic IRQ handling ?


Also,how PIC/CPU comes to know that interrupt is coming from which device?


Thanks

Amit Singh Tomar.


"ARM is taking over the world"

Parents
  • Absolute minimum handler:

    IRQ_handler

         SUB       lr, lr, #4       ; modify LR

         SRSFD     #0x12!           ; store SPSR and LR to IRQ mode stack

        PUSH      {r0-r3, r12}     ; store AAPCS registers on to the IRQ mode stack

         BL        IRQ_handler_to_specific_device

         POP       {r0-r3, r12}     ; restore registers

         RFEFD     sp!              ; and return from the exception using pre-modified LR

    * Note this does not handle stack alignment

Reply
  • Absolute minimum handler:

    IRQ_handler

         SUB       lr, lr, #4       ; modify LR

         SRSFD     #0x12!           ; store SPSR and LR to IRQ mode stack

        PUSH      {r0-r3, r12}     ; store AAPCS registers on to the IRQ mode stack

         BL        IRQ_handler_to_specific_device

         POP       {r0-r3, r12}     ; restore registers

         RFEFD     sp!              ; and return from the exception using pre-modified LR

    * Note this does not handle stack alignment

Children
No data