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Of exceptions and aborts..

Note: This was originally posted on 21st January 2009 at http://forums.arm.com

The ARM reference manual specifies sometimes MOV PC,R14 and sometimes SUBS PC,R14, #4 for returning from exceptions. But they have not mentioned why. Can somebdy expain?
Also, when exactly does the PC get incremented? During the Fetch ?
And exactly when (Fetching / Decoding / Executing) does an exception get generated?
Does an undefined instruction get generated when the instruction is decoded or when it is executed?
What about Data and Prefetch aborts?
Parents
  • Note: This was originally posted on 29th January 2009 at http://forums.arm.com

    The ARM reference manual specifies sometimes MOV PC,R14 and sometimes SUBS PC,R14, #4 for returning from exceptions. But they have not mentioned why. Can somebdy expain?

    Ans:

    SUBS PC,R14, #4 , this instruction is used for debugging. After the execution of this instruction , pc will point to the instruction which caused the exception. Hence one can debug the cause of exception.

    Mov pc, lr is intended to be the last instruction off all the subroutines. Execution of this instruction is similar to a return statement in C.
Reply
  • Note: This was originally posted on 29th January 2009 at http://forums.arm.com

    The ARM reference manual specifies sometimes MOV PC,R14 and sometimes SUBS PC,R14, #4 for returning from exceptions. But they have not mentioned why. Can somebdy expain?

    Ans:

    SUBS PC,R14, #4 , this instruction is used for debugging. After the execution of this instruction , pc will point to the instruction which caused the exception. Hence one can debug the cause of exception.

    Mov pc, lr is intended to be the last instruction off all the subroutines. Execution of this instruction is similar to a return statement in C.
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