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TCM and ARM1136

Note: This was originally posted on 13th January 2009 at http://forums.arm.com

Hi,

I am trying to use DTCM to see if I can improve performance of my program on ARM1136.

I wrote a test program that just read/write TCM and read/write to RAM.  However anlayzing the timing of the test program there seemed to be no performance increase at all.

Therefore, I am suspecting that I am not enabling TCM correctly.  Could someone please help me confirm, I am really stuck here :)?
-> I arbitrarily just picked 0x80000000 to use, since I know that nothing else is addressed there.  Can I do this? Or do I need to have some specific HW knowledge here?
-> Next I enabled it to use 4K TCM by ORing my base address it with 0xd.
-> If I used the following code, will any load/store that I subsequently do to 0x80000000 be going to TCM or am I missing something? 
MCR p15, 0, r0, c9, c1, 0;r0 was filled with (0x80000000|0xd)
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  • Note: This was originally posted on 13th January 2009 at http://forums.arm.com

    Choosing 0x80000000 is fine, provided that it does not overlay anything critical in your physical memory map.

    It is worth noting that 0x80000000 is a Physical Address; assuming that you have the MMU enabled you will need to provide a sensible VA mapping of this address in the translation tables to make it available to the code that is running.

    If you don't have MMU enabled, you will want to look at enabling it - this enables the D-cache to function on ARM11 which gives very large speed increases!
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  • Note: This was originally posted on 13th January 2009 at http://forums.arm.com

    Choosing 0x80000000 is fine, provided that it does not overlay anything critical in your physical memory map.

    It is worth noting that 0x80000000 is a Physical Address; assuming that you have the MMU enabled you will need to provide a sensible VA mapping of this address in the translation tables to make it available to the code that is running.

    If you don't have MMU enabled, you will want to look at enabling it - this enables the D-cache to function on ARM11 which gives very large speed increases!
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