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AXI Wrap Bursts

In case of wrapped bursts, we need to calculate first the Aligned_Address, using:

Suppose start address is 55, assuming 32 - bit bus, burst length of 4

Aligned_Address = (INT(Start_Address / Number_Bytes) ) * Number_Bytes;

The value is :: 52 or 56 i.e. do we have round to lower or upper value.

Then we calculate the wrap boundary, using
Wrap_Boundary = ((INT(Start_Address / (Number_Bytes * Burst_Length))) * (Number_Bytes * Burst_Length);

What does this wrap boundary actually indicate,
1. The address from where wrapping will take place.
2. The address value after wrap.


Also, if anyone can let me know in a step-wise manner how the address are calculated using the same scenario above, would be great.

Hope to see the replies soon.
  • Note: This was originally posted on 29th May 2009 at http://forums.arm.com

    >do we have round to lower or upper value.

    Wraps have to be aligned - so address 55 is not a legal address for 32-bit beat (must be 4 byte aligned). So it can't happen - a master should never generate the transaction.

    If you had an aligned 32-bit wrap of 4 beats starting at address 0x4 then you would get the following access pattern:

    0x4, 0x8, 0xc, 0x0

    The wrap boundary is considered 0xf in this case.

    Cheers, Iso


    Obviously, the address 55 is not an aligned address. We need to get the aligned address,using the formula in the spec.
    And then we store the data in the memory.

    According to that the aligned address for 55 is 56. and then it will wrap at a boundary at which boundary???
  • Note: This was originally posted on 1st July 2009 at http://forums.arm.com

    A wrap start address **must** be beat-aligned. It is illegal for a master to make an unaligned wrap request - it wouldn't be AXI conformant.

    There are two kinds of alignment in a wrap:

    Start_Address needs to be aligned on the beat-size, so for a 32-bit beat it needs 4-byte aligned, 16-bit beat needs to be 2-byte aligned, etc. In this case your start address (55) is not a valid Start_Address for a 32-bit beat  - ..., 52, 56, 60, 64, ... would be OK for example.

    > Aligned_Address = (INT(Start_Address / Number_Bytes) ) x Number_Bytes.

    Aligned_Address is the lowest address accessed by the wrap - and it is aligned on a boundary which matches the total number of bytes in the burst. So beat-size * number-of-beats. For a burst with 8 x 32-bit beats the Aligned_Address would be 256-bit aligned.

    Using my example earlier. If you had a 32-bit wrap of 4 beats starting at address 0x4 then you would get the following access pattern:
    0x4, 0x8, 0xc, 0x0

    Start Address = 0x4
    - this is allowed as it is aligned on a beat boundary.

    Aligned_Address = (INT(0x4 / 0x10)) * 0x10 = INT(0.25) *0x10 = 0 x 0x10 = 0
    - this is allowed as it is aligned on a total_bytes boundary.

    Note that INT() is a C style cast - it always truncates decimal parts (rounds down).


    In my case what will be the wrap address, or how will i determine the wrap boundary.
  • Note: This was originally posted on 27th July 2009 at http://forums.arm.com

    Thanks a lot for your support & such a detailed reply.

    Regards,
    Parag Goel
  • Note: This was originally posted on 28th May 2009 at http://forums.arm.com

    >do we have round to lower or upper value.

    Wraps have to be aligned - so address 55 is not a legal address for 32-bit beat (must be 4 byte aligned). So it can't happen - a master should never generate the transaction.

    If you had an aligned 32-bit wrap of 4 beats starting at address 0x4 then you would get the following access pattern:

    0x4, 0x8, 0xc, 0x0

    The wrap boundary is considered 0xf in this case.

    Cheers, Iso
  • Note: This was originally posted on 29th May 2009 at http://forums.arm.com

    A wrap start address **must** be beat-aligned. It is illegal for a master to make an unaligned wrap request - it wouldn't be AXI conformant.

    There are two kinds of alignment in a wrap:

    Start_Address needs to be aligned on the beat-size, so for a 32-bit beat it needs 4-byte aligned, 16-bit beat needs to be 2-byte aligned, etc. In this case your start address (55) is not a valid Start_Address for a 32-bit beat  - ..., 52, 56, 60, 64, ... would be OK for example.

    > Aligned_Address = (INT(Start_Address / Number_Bytes) ) x Number_Bytes.

    Aligned_Address is the lowest address accessed by the wrap - and it is aligned on a boundary which matches the total number of bytes in the burst. So beat-size * number-of-beats. For a burst with 8 x 32-bit beats the Aligned_Address would be 256-bit aligned.

    Using my example earlier. If you had a 32-bit wrap of 4 beats starting at address 0x4 then you would get the following access pattern:
    0x4, 0x8, 0xc, 0x0

    Start Address = 0x4
    - this is allowed as it is aligned on a beat boundary.

    Aligned_Address = (INT(0x4 / 0x10)) * 0x10 = INT(0.25) *0x10 = 0 x 0x10 = 0
    - this is allowed as it is aligned on a total_bytes boundary.

    Note that INT() is a C style cast - it always truncates decimal parts (rounds down).
  • Note: This was originally posted on 1st July 2009 at http://forums.arm.com

    As I mentioned before, your example is not a valid AXI transfer - it can never happen.

    The formula in the spec if for calculating the Aligned address in the wrap, not for aligning the start address - that must be aligned by the master making the access.

    For a 4-byte beat your start address must be 4-byte aligned. 55 is not. To repeat what I said before:

    [snip]
    Start_Address needs to be aligned on the beat-size, so for a 32-bit beat it needs 4-byte aligned, 16-bit beat needs to be 2-byte aligned, etc. In this case your start address (55) is not a valid Start_Address for a 32-bit beat - ..., 52, 56, 60, 64, ... would be OK for example.
    [/snip]

    However, assuming a start address of 56 the following calculation would apply:

    Burst Len = 32-bit beat * 4 beats = 16 bytes

    Aligned address:
    = INT(56 / 16) * 16
    = INT(3.5) * 16
    = 3 * 16
    = 48

    Wrap boundary:
    = highest byte accessed in burst
    = 48 + 16 -1
    = 63

    Access Pattern:
    = 56, 60, 48, 52
  • Note: This was originally posted on 2nd July 2009 at http://forums.arm.com

    However, assuming a start address of 56 the following calculation would apply:

    Burst Len = 32-bit beat * 4 beats = 16 bytes

    Aligned address:
    = INT(56 / 16) * 16
    = INT(3.5) * 16
    = 3 * 16
    = 48

    Wrap boundary:
    = highest byte accessed in burst
    = 48 + 16 -1
    = 63

    Access Pattern:
    = 56, 60, 48, 52


    Just guessing here, but I would assume that the OP is trying to create an AXI transaction such that the first beat includes data from address 55. Being a 32 bit access, the corresponding aligned word address is 52. The resulting access pattern would be: 52, 56, 60, 48.

    Regards
    Marcus
    [url="http://www.doulos.com/arm/"]http://www.doulos.com/arm/[/url]