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Hi,
We are currently working with Cortex M4 processor and previously we worked with Cortex R5 processor. As part of our project requirement, we need to detect "prefetch abort" exception and to identify the corresponding address. In Cortex R5, we are taking these information from Instruction Fault Status Register (IFSR) and Instruction Fault Address Register (IFAR).
But in Cortex M4 processor, we understand that "prefetch abort" exception can be captured using BusFault exception (BFSR.IBUSERR). But as per M4 reference manual, we understand that the processor does not update the Bus Fault Address Register (BFAR). Kindly confirm whether our understanding is OK or not. Also please provide the information to get the address corresponding to "prefetch abort".
Regards,
Dinesh
Right BFAR is for data access faults: From the manual "Shows the address associated with a precise data access fault."And:BusFault on instruction fetch, precise Status bit BFSR.IBUSERRVector catch bit DEMCR.VC_BUSERRBus error on an instruction fetch. The fault occurs only if the processor attempts to execute the instruction. The processor does not update the Bus Fault Address Register.