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Hi all,
I am studying ARMv8_VSMA. I have a question about the XN bit in the table descriptor.
In the manual, there is an explanation about this as below.Execute-never controls determine whether instructions can be executed from a memory region.
Here is a stage 1 address translation(4K granule):TTBR_ELx--->L0 descriptor--->L1 descriptor--->L2 descriptor--->L3 descriptor--->4K page
If XN bit in the L0 table descriptor is set to 1, does that mean cpu can't fetch instructions from the address of L1 descriptor? ---If that is ture, whether XN is set or not should not affect the lookup of L1 because the address of L1 descriptor should store the L1 descriptor, not any instructions. Am I right?---If not, what is my misunderstanding?
Thank you.
Yes.