Hi all,I noticed there are multiple system control registers in ARM.
The SCTLR_EL1 , SCTLR_EL2 and SCTLR_EL3.
I want to know, what do multiple such system controls registers represent??
I am particularly interested in the A bit of the system control register.
How does the A bit work when all these registers are involved?
For instance, When the A bit is enabled in say SCTLR_EL1 but not in SCTLR_EL2, what happen in case of an unaligned access?
Do we encounter a segmentation fault?
if yes why?
Please read the ARMv8-A manual you were linking in another thread, for example:UMA
User Mask Access. Controls access to interrupt masks from EL0, when EL0 is using AArch64.