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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 10 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    717 questions
    Antonios Kekempanos
    RE: Error Synthesizing Design Start ARM Cortex M3 on Xilinx FPGA 23 hours ago
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 9 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 4 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Suggested Answer

    Too many binary changes with two byte varying in the source code. Why? 0

    • stm32 h7
    • Keil MDK Professional Edition
    502 views
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    by Broeker
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    AMBA APB 0

    • APB
    419 views
    1 reply
    Latest 3 months ago
    by Colin Campbell Arm Employee Badge
  • Answered

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    1128 views
    4 replies
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    by Wayne Fannon
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    Mysterious strange gpio port behaviour 0

    501 views
    1 reply
    Latest 3 months ago
    by Wayne Fannon
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    Problems converting uVision project to csolution 0

    221 views
    0 replies
    Started 3 months ago
    by G .
  • Answered

    Unable to write to memory region marked as both writable and executable on cortex-R82 0

    • Cortex-R82
    • Memory Architecture
    685 views
    5 replies
    Latest 3 months ago
    by HamzaF
  • Not Answered

    M0 GPIO level-sensitive interrupt, how many minimal CPU cycles? 0

    • Cortex-M0
    • Interrupt Handling
    235 views
    0 replies
    Started 3 months ago
    by Liudr
  • Not Answered

    Delayed Population of Flash Download Algorithms when Loading from a CMSIS Toolbox Project 0

    370 views
    1 reply
    Latest 3 months ago
    by Ian Fyall
  • Suggested Answer

    processus time double after fews seconde 0

    • OpenCL
    • Android
    • Multiprocessor
    2317 views
    15 replies
    Latest 3 months ago
    by hterrolle
  • Suggested Answer

    SBOM generation +1

    • Keil MDK
    • uVision
    • Keil Tools
    613 views
    2 replies
    Latest 3 months ago
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    target_include_directories in CMakeLists 0

    550 views
    3 replies
    Latest 3 months ago
    by Nekoneko
  • Answered

    In CHI how the Slave side is giving the L-Credits to the Master Side 0

    • AMBA 5 CHI
    • CHI
    • AMBA CHI C2C
    • Network on Chip (NoC)
    772 views
    3 replies
    Latest 3 months ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    Number of outstanding transactions in AXI 0

    • performance
    • AXI4
    • interconnect
    692 views
    1 reply
    Latest 3 months ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    How to Program a Device Using a File from a Postbuild when in a CMSIS Toolbox Project? 0

    217 views
    0 replies
    Started 3 months ago
    by Nicholas Oliver
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