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  • AMBA
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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 10 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    717 questions
    Antonios Kekempanos
    RE: Error Synthesizing Design Start ARM Cortex M3 on Xilinx FPGA 17 days ago
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 9 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 4 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Not Answered

    Create Software Pack 0

    • Microcontroller (MCU)
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    Can a Linux kernel run as a TrustZone secure OS? +1

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    Latest over 11 years ago
    by Sudeep Holla Arm Employee Badge
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    Getting Started in Real-Time Applications 0

    • Real-Time
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    Using the function WWORD when simulating with keil uvision 4 0

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    by Andy Neil
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    RTX MainThread def use case 0

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    • Keil MDK
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    • Keil MDK
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    • Armv8
    • Armv8-A
    5359 views
    1 reply
    Latest over 11 years ago
    by Sudeep Holla Arm Employee Badge
  • Answered

    eglChooseConfig on Samsung Galaxy S5 running ARM Mali T628 MP6 +1

    • Mali-T728
    • OpenGL ES
    • Adaptive Scalable Texture Compression (ASTC)
    • Mali-GPU
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    9 replies
    Latest over 11 years ago
    by Tom Hudson
  • Not Answered

    Debugging code in DDR 0

    • Keil MDK
    3167 views
    8 replies
    Latest over 11 years ago
    by ImPer Westermark
  • Answered

    ARM Cortex A8 - if IRQ interrupts are disabled in CPSR register While the processor is executing, system results in data abort. What might be the reason to trigger data abort +1

    • CPSR
    • Cortex-A
    • Cortex-A8
    • Processors
    • Interrupt
    5761 views
    1 reply
    Latest over 11 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    What happens if an interrupt occurs as it is already disabled +1

    • Armv7
    • Cortex-A
    • Cortex-A8
    • Interrupt
    11117 views
    2 replies
    Latest over 11 years ago
    by Peter Harris Arm Employee Badge
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