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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    102 questions
    Kevin Mooney
    RE: about ArmRAL 26.01 check and examples crash on RPi-4 and RK3588 3 hours ago Arm Employee Badge
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    720 questions
    Colin Campbell
    RE: NIC-400 editing microarchitecture about timing closure 2 days ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 10 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 5 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Not Answered

    Starting with uVision 0

    • Microcontroller (MCU)
    967 views
    2 replies
    Latest over 10 years ago
    by rkopsch Arm Employee Badge
  • Not Answered

    DS-5: Disassembly view of ELF Content Editor not working 0

    • ds-5
    • elf
    3960 views
    1 reply
    Latest over 10 years ago
    by semp
  • Answered

    How can we boot linux kernel in ARM FVP w/ TrustZone? 0

    • Cortex-A9
    • Cortex-A
    • TrustZone
    • Linux
    8895 views
    4 replies
    Latest over 10 years ago
    by Yoshiharu Imamoto
  • Not Answered

    Is First-level table skippable? (VMSA) 0

    • Cortex-A17
    • AArch64
    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    • AArch32
    8193 views
    4 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Cortex-R5 and Cortex-R7 implement as Dual-Core Lock Step (DCLS), does the two core run inparallel? +1

    • Processor
    • Cortex-R
    • Cortex-A
    7889 views
    2 replies
    Latest over 10 years ago
    by 42Bastian
  • Not Answered

    32 Bit swap algorithem 0

    • Keil MDK
    4150 views
    4 replies
    Latest over 10 years ago
    by Doron Matatyahu
  • Not Answered

    creating .hex for bootloader with cubeMX-Project 0

    • Keil MDK
    2549 views
    1 reply
    Latest over 10 years ago
    by Westonsupermare Pier
  • Not Answered

    memcpy on register variables 0

    • Keil MDK
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    2 replies
    Latest over 10 years ago
    by nice day
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    USART fails in EXTI Interrupt 0

    • Keil MDK
    2374 views
    4 replies
    Latest over 10 years ago
    by hamed ad
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    • Keil MDK
    964 views
    3 replies
    Latest over 10 years ago
    by Westonsupermare Pier
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    The data output from the memory when debugging 0

    • Keil MDK
    2615 views
    3 replies
    Latest over 10 years ago
    by Westonsupermare Pier
  • Not Answered

    configure spi for tm4c123g 0

    • Keil MDK
    2822 views
    0 replies
    Started over 10 years ago
    by amir babaei
  • Answered

    Does Mali T760 support UMP? +1

    • Mali Drivers
    • Mali-T760
    • Mali-400
    6271 views
    5 replies
    Latest over 10 years ago
    by mac_l1
  • Answered

    How should I do if I want to enable only one single CPU on a Cortex A9 MPCore(2 CPUs) +1

    • Cortex-A9
    • Cortex-A15
    • Cache
    • Cortex-A
    • Linux
    4862 views
    1 reply
    Latest over 10 years ago
    by 박주병
  • Answered

    How to set inner of outer shareability on page table entry WITHOUT TEX remap?? 0

    • Cortex-A
    • TrustZone
    6970 views
    3 replies
    Latest over 10 years ago
    by Matt Sealey Arm Employee Badge
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