sorry for response after a long time,
as per above steps you mentioned
Yes, when you do single step, you should write DHSCR = 0xA05F0001UL | 0x4 ; // C_STEP Then wait until S_RETIRE_ST is 1. And then set DHSCR = 0xA05F0001UL; // unhalt Hope this helps. Joseph
Yes, when you do single step, you should write
DHSCR = 0xA05F0001UL | 0x4 ; // C_STEP
Then wait until S_RETIRE_ST is 1.
And then set
DHSCR = 0xA05F0001UL; // unhalt
Hope this helps.
Joseph
i performed
when core halt after break point hit
i tried single step the target as below
Target_write(DHCSR, 0xA05F0101);
while(!(target_read(DHCSR) & S_RETIRE_ST));
but the target is always present inside while loop!!!
i tested the above logic before i put the break point and i successfully executed the Single Step
but after breakpoint hitting if i trying to step, it will not come out from while loop.
Should i have to perform any thing before i single step??? i.e., Should i have to wrtie any thing in DFSR????
Thanks and Regards,
Harshan
Do you mean the processor does not come out of while loop in the application code, or you debugger does not come out of the while loop in the control sequence?
Regards,
Hi Harshan,
Try changing the Link Register value to next instruction.
I do this when I faced the same scenario. But not sure how this will affect actual execution.
Techguyz
Thanks for Reply sir,
the debugger does not come out of the while loop in the control sequence.
Thanks and Regards
Harshan.
Couple of things to try:
(I am on a trip right now so don’t have access to any test setup, so need to guess)
- Could you try disable the breakpoint before the single step?
- Instead of check S_RETIRE_ST, maybe poll for S_HALT instead
Also, the DFSR can also give information to see what cause the halting after the single step, that might give some hints.
Thanks for Reply,
i got it, by the following procedure after break point hit i collected PC then modified the breakpoint in fpu to PC+4 reset the DFSR then continue after target break at PC+4
i modified the breakpoint in fpu from PC+4 to PC reset the DFSR then continue:)
hear my doubt is if the (breakpoint address % 4 == 0) then only it is responding the other breakpoint else i got the illegal response
but i don't know why this happening??
The size of instruction is not always 4. So setting breakpoint to PC+4 doesn’t always work.
And if the instruction you want to step is a branch, then it won’t go to PC +2 or PC +4 anyway.
thanks for reply,
you are exactly correct it wont responding except %4 == 0,
you mean this will avoided by single step the processor???
I've been following your progress closely with great interest.
Though I can not tell you how to make it work, one thing I can do is to confirm that the best thing you can do, is to make the processor handle the single stepping.
The CPU's hardware should be able to do this for you.
I know that OpenOCD supports single-stepping, since I've used it many times, so you might benefit from finding single-stepping in OpenOCD's source code.
I'm quite sure you're very close to the correct solution; this looks like it's the last thing blocking you from having it working.