ARM® Compiler 6 is the next generation C/C++ compilation toolchain from ARM, based on Clang and the LLVM Compiler framework. Version 6.00 of the toolchain provides architectural support for v8 of the ARM Architecture and alpha support for v7-A. It can be used in conjunction with ARM DS-5 Development Studio to build and debug ARMv8 executable code. In this blog post, we shall look at the scalability benefits that LLVM brings for solving code generation problems for modern microarchitectures that are complex and product designs that are demanding in terms of performance and functionality. We shall also explore how the collaborative open source development process helps in responding to the challenges of ever shorter design cycles, by making tools development more agile and efficient.
The compiler in ARM Compiler 6 toolchain is armclang, based on Clang, a C/C++ front end for the LLVM code-generation framework. LLVM is designed as a set of reusable libraries with well defined interfaces. In comparison, armcc, the compiler in ARM Compiler 5 is composed of modules with less well defined interfaces and separation, which makes the parts less reusable across a larger code generation problem space. armclang strictly adheres to the three phase LLVM design with a front end parser and syntax checker, a mid end optimizer and code generators that produce native machine code in the backend. The three phases have clear separation in terms of their intended function and this aspect of LLVM makes it reusable and flexible.
LLVM IR, or Intermediate representation, is the glue that connects the three phases. LLVM IR is the only interface to the optimizer and is designed as a first-class language with well defined semantics. LLVM IR was designed from ground up, with supporting common compiler optimizations in mind. The optimizer itself is designed as a set of passes that apply transformations to the input IR to produce IR that feeds into the code generator, which then can produce efficient machine code. The library based design of the optimizer allows the toolchain designers to select passes and optimizations that are most relevant for the given application domain and produce efficient code with minimum effort.
LLVM framework also makes it easier to add new targets, e.g. by using target description (.td) files to concisely describe a large part of the target architecture in a domain-specific language. Partners also have the option of adding their own backends for custom DSPs or GPUs as plugins into the toolchain. The code generator itself is based on several built-in passes for common problems like instruction selection, register allocation, scheduling etc, so adding new code generators from scratch is relatively easy. The expressiveness of target description syntax is being continuously improved, so that it becomes easier to add targets in the future. The modular design and robust LLVM IR format yields itself well to specialized code generation challenges such as security related extensions sometimes found on embedded microcontrollers .
ARM Compiler 6 comes with optimized libraries and armlink, an industrial strength linker that has been developed over the years as part of the ARM Compiler toolchain and this nicely complements the benefits accrued from LLVM as detailed above. For example, we expect to introduce link time optimization in a future version of the product that would bring together the benefits of LLVM technology for optimization (leveraging the support for bitcode format in LLVM) and the time tested robustness of armlink. When introduced, this would enable optimization across library boundaries which was not possible using older versions of ARM Compiler. By applying ARM’s best-in-class embedded libraries, ARM Compiler 6 generates highly optimized library functions tuned specifically for the ARM architecture, improving both performance and power consumption.
LLVM is licensed under the University of Illinois/NCSA Open source license which means
LLVM development happens in the open, with contributions committed to the codebase on a regular basis. Each contribution is evaluated on its merits by a rigorous development process that involves community led code reviews, addition of new tests for the contribution and qualification by a 100% pass rate on existing regression tests before it gets accepted into the codebase. The support for ARMv8 Advanced SIMD introduced in the LLVM AArch64 backend for ARMv8 is a good example of a successful result of this process in action, where ARM and Qualcomm collaborated in the community to deliver a well validated piece of functionality to upstream LLVM. The AArch64 backend itself is validated and kept free of regressions by means of a community hosted buildbot which tests whether Clang can correctly cross-compile itself and runs LLVM regression tests using the cross-compiled Clang, targeting an AArch64 Linux platform. This means ARM partners bringing products to market can focus on true differentiating factors and spend less in terms of software development effort on the correctness and quality of common code generation. This development model cuts waste and prevents fragmentation of code generation efforts across the partnership. ARM is at the heart of a rich ecosystem of silicon partners, tools vendors, EDA, OEM and software development partners and combining the strength of the partnership with that of the open development model helps in speeding up innovation across the segments that the partnership operates in.
We have seen how ARM Compiler 6 makes use of the modular design of LLVM and how this can help to solve code generation problems for product designs based on the ARM architecture. This is the first version of the product in which we are switching from proprietary compiler technology (whose origins date back to the initial days of the ARM architecture itself) to LLVM and what an exciting transition this has been! With the successful transition, I believe we are on a firm foundation to meet the code generation challenges posed by superscalar architectures with multiple pipeline stages, heterogeneous multi-processors, and exacting power efficiency requirements. We would love to hear from partners who wish to collaborate on LLVM technology and/or on ARM Compiler 6. ARM Compiler 6 is supported initially in DS-5 Ultimate Edition. If you are interested in evaluating ARM Compiler 6, you can request an evaluation by going to DS-5 Ultimate Edition.