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ARM and Cadence Work Together to Simplify IoT Design

Eoin McCann
Eoin McCann
June 9, 2016
5 minute read time.

How is the Internet of Things landscape like San Francisco in the 1800’s? Well the gold rush gave opportunity to many who came to find their fortune. They sought to move beyond the established order through applying new thinking to tap into the huge reserves that everybody knew was in those hills. Similarly, the IoT gives opportunity to thousands of designers and start-ups who can develop new applications to solve existing problems or use cases in a more effective way. Many of those applications would require integration and performance levels that will drive the need for specialised IoT chips.

ARM® is committed to enabling the IoT everywhere, and part of this means removing the barriers to entry that could streamline the SoC design process.

  • Time: Due to the new nature of the IoT, market trends and requirements can change very suddenly meaning that there is a narrow time window to build a chip and get it to market.
  • Expertise: IoT chips are complex because they require integration of very different types of IP: digital processing, radio or wired connectivity, mixed-signal blocks, low power memory, Flash, … and all this with an ultra low power budget. SoC designers not only need to integrate processors, memory, connectivity and other IP blocks together, but then implement it in a system. Using a range of different tools and methodologies requires expertise.
  • Access: When you are focused on tweaking the design of your SoC to meet your target application, you don’t want to be thinking about the nitty gritty of setting up the right infrastructure for IP storage and EDA tools.

Helping Designers from Concept to Silicon

The announcement that the ARM IoT Subsystem for Cortex-M has been ported into the Cadence® Hosted Design Solution is a meaningful step in the direction of helping to streamline the process of taking an idea from concept to silicon for the IoT. It is suited to a wide spectrum, from start-ups to experienced SoC designers with the promise of reduced time and increased flexibility.

The package includes processor IP, wireless connectivity solution, interface IP, software, design tools (both front- and back-end), optimized design methodology and scripts.

The combined offering accelerates mixed-signal SoC design for IoT as it incorporates ARM’s IoT subsystem for Cortex-M and Cadence’s Innovus Implementation System, which is now optimized specifically for Cortex-M. The mixed-signal IoT flow is also available on the Cadence Hosted Design Solution (HDS), a Software as a Service (SaaS) model which offers quick access to various EDA tools, a broad portfolio of IP, support and proven methodologies for designing for IoT. By gaining access to the Cadence HDS Enablement Program, designers are able to accelerate time-to-silicon by increasing their productivity, flexibility and level of support. The access to a lower cost hardware infrastructure is also ideal for start-ups and those new to IoT SoC design.

Let’s take a closer look at what’s included:

Processor IP: The IoT subsystem connects to an ARM Cortex-M3 processor. The Cortex-M3 is used in many current IoT devices, and is a good choice to run complex software stacks like mbed OS while keeping the power consumption low. Learn more about the Cortex-M3

Wireless connectivity: The IoT subsystem is ready to connect to ARM Cordio® radio, bringing Bluetooth® Smart connectivity. Integration of the Bluetooth software stack with mbed OS is already done, so software is already available to use it. Unplug and play! Learn more about Cordio Bluetooth LE radio

Interface IP: Cadence interface IP blocks can be very easily connected to the IoT subsystem, and software drivers for common interfaces are already pre-integrated in IoT software available from ARM. This makes it easier and faster to build applications connecting to sensors and other peripheral components.

Software: Software development is a very large part of the design time. The IoT subsystem has been developed in sync with ARM’s open-source mbed  OS, and hardware drivers are already available when you download the software stack. This makes an SoC based on the IoT subsystem very attractive to software developers, who can start creating applications and use all the features of mbed OS right away. Learn more about mbed OS

Front-end design tools: The Cadence Genus  Synthesis Solution delivers the best possible productivity during register-transfer-level (RTL) design and the highest quality of results (QoR) in final implementation.

Learn more about Genus

Back-end design tools: The Cadence Innovus  Implementation System is a physical implementation tool that delivers typically 10-20% production-proven power, performance, and area (PPA) advantages along with up to 10X TAT gain at advanced 16/14/10nm FinFET designs as well as at established processes. Learn more about Innovus

It has been over a year since ARM announced the IoT Subsystem for Cortex-M to help developers reduce the time and risk involved in SoC design. Since then, ARM has publically displayed silicon as part of a test chip that took 3 engineers 3 months to tape out. You can find out more in liamdillon's blog: ARM enables IOT with Beetle Platform.

Cadence’s Hosted Design Solution (HDS) is the ideal environment to help designers get started on their IoT development. The ability to remotely access proven EDA tools and support makes it easy for teams to work no matter where they are in the world.

What all of this adds up to is a complete end-to-end solution for designers. Reducing the time and expertise needed to enter the market spreads the opportunity that IoT brings to a much wider audience than before. Enabling even more designers can be the catalyst to accelerated innovation and targeted applications for new use cases.

Innovation Comes From Removing Barriers to Entry

If we truly want to make it the Internet of Everything, then we need to make it as easy as possible for people to develop applications that will shape the future. Reducing the barriers to doing so; cost, expertise and time, is a large step towards enabling a wide range of designers begin development of their idea.

Enabling the creation of optimized SoCs with a simpler process will also drive innovation and make possible a new range of applications that could not be implemented with off-the-shelf components due to cost, size or power-consumption issues. ARM and Cadence therefore enable a new world of opportunities to companies that previously could not afford this level of integration into their products.

Anonymous
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