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Lots of ARM-related content at SNUG Silicon Valley 2017

Phil Dworsky
2 minute read time.

I'm getting excited for the annual Synopsys User's Group Meeting - SNUG Silicon Valley, which promises to be an excellent and well attended event as usual.

It's a great place to learn the latest about Synopsys tools, IP and methodology from your peers, Synopsys experts and our strategic partners like ARM, a platinum WW SNUG sponsor--thank you, ARM!

In addition to being able to visit with Synopsys and ARM folks at the SNUG Pub event on Wednesday, March 22 (5:15 pm - 7:00 pm), you can attend these great ARM-related sessions as well as the keynote address, which both cover a wide spectrum of technologies:

Wednesday, March 22, 2017:

  Time Room Session description & presenters
Wednesday 9:00 am - 10:30 am Mission City Ballroom Keynote: "Silicon to Software to Smart Everything"
Speaker: Aart de Geus (Synopsys Chairman & co-CEO)
  11:00 am - 11:45 am Room 209 Widening the Scope and Adoption of FPGA-based Physical Prototyping at ARM
Speaker: Peter Fogl, Senior Engineer, ARM Ltd
  11:45 am - 12:30 pm Room 209 Trapping the Hardest to Find Hardware Bugs in the Latest ARM Cores Using FPGA-based HAPS Debug Technologies
Speaker: Peter Gibbons, Senior FPGA Engineer, ARM Ltd.
 Lunch 12:30 pm - 2:00 pm TBD Lunch & Learn session, including:
IC Compiler II - Achieving industry-best QoR on advanced designs
Verification - SoC leaders verify with Synopsys
  2:45 pm - 3:30 pm Hall A3 A Simple RTL IP Obfuscation Flow - Using Synopsys VCS, DC and Formality
Speaker: David Flynn, Fellow, ARM Ltd
  3:45 pm - 5:15 pm Mission
City 1

Best Practices for High-Performance, Energy Efficient Implementations of the Latest ARM® Processors in 16-nanometer FinFET Compact (16FFC) Process Technology Using Synopsys Galaxy™ Design Platform
NOTE: The next generation processor covered here supports the recently announced ARM DynamIQ technology as blogged by .
Speaker: Vidit Babbar, ARM
Speaker: Joe Walston, Synopsys
  5:15 pm - 7:00 pm Hall B SNUG Pub - social and networking event (ARM is a Platinum
       
Thursday  9:00 am - 10:00 am Mission City Ballroom Keynote: "Learning and Multiagent Reasoning for Autonomous Robots"
Speaker: Dr. Peter Stone, David Bruton, Jr. Centennial Professor of Computer Science, The University of Texas at Austin and Cogitai, Inc.
  11:15 pm - 12:00 pm Hall A2 Does IC Compiler II Efficiently Improve Implementation Results for ARM® Cortex-A73 Using POP IP?
Speaker: Rupal Gandhi, ARM
Lunch 12:00 pm - 1:30 pm TBD Lunch & Learn sessions, including:
Custom Design - Cutting FinFET layout tasks from days to hours
Design Compiler - Advanced silicon design success with Design Compiler
IP/Automotive - what it takes to meet automotive compliance
  5:00 pm - 6:30 pm Mission City Ballroom Awards & SNUG After Party
(NOTE: wristbands are required for entrance - pick yours up on Thursday from 8:00 am - 4:00 pm at the Information booth in the Registration area)

There's more information available about all the sessions in the SNUG Silicon Valley homepage.

If for some reason you're not able to attend live, you can download many of the presentations as well as view recorded audio + slides from from the SNUG archives after the event. If you're from outside of Silicon Valley, you can also attend the SNUG event in your area.

Anonymous
Architectures and Processors blog