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"Dormant Mode" for Cortex M3/M4

Hi,

We are interested in minimizing startup time from deep sleep mode.

Some of the older ARM cores implement a dormant mode whereby the CPU core context (state) is written to RAM prior powering it down, and then then restored after the CPU core  is powered up again.  In this way, only the RAM needs to be powered in deep sleep mode and therefore minimize current consumption.

In simple terms, we could simply push *all* registers onto the stack, and then pop them off on wakeup, and this would be relatively straightforward - obviously we would need to initialize the stack pointer etc as part of startup. However, I am wondering if these is a more "inelegant" solution.

Has anybody implemented such a mode, or provide links or suggestions

Thanks,

Steven

  • Hello,

    I think you have a kind of fantasy for the dormant mode.

    It is responsible of an SoC vendor to implement low power feature in the dormant mode.

    In the dormant mode, the signal which indicates CPU had entered the dormant mode is only asserted.

    Therefore the signal is almost the same as SLEEPING or SLEEPDEEP of Coetx-M core.

    I think that almost all MCU of which CPU is Cortex-M is implemented such the mode.

    Best regards,

    Yasuhiko Koumoto.