How to enable lumex FVP cache_state_model ? It seems slc cache could not be modelld?

saiph wang 16 hours ago

Hi ,

we follow the document https://developer.arm.com/documentation/109541/24-3/Testing-the-software-stack-and-FVP/Buildroot-tests/Test-MPAM?lang=en to test MPAM function on dsu0 L3 Cache.

I found lumex fvp on tc4-branch could not support cache_state_modelled

FVP boot script:

FVP_RD_Lumex/models/Linux64_GCC-9.3/FVP_RD_Lumex \
-C board.flashloader0.fname=./run-scripts/tc4/../../output/tc4/buildroot/fvp/swr/deploy//fip_gpt-tc.bin \
-C css.sms.scp.uart.uart_enable=1 \
-C css.sms.scp.uart.out_file=/mnt/wd10t/saiph/lumex/run-scripts/tc4/logs/buildroot/2025_11_17_06_31_下午/uart0_soc_scp.log \
-C css.sms.scp.uart.unbuffered_output=1 \
-C css.sms.rse_pl011_uart.uart_enable=1 \
-C css.sms.rse_pl011_uart.out_file=/mnt/wd10t/saiph/lumex/run-scripts/tc4/logs/buildroot/2025_11_17_06_31_下午/uart1_soc_rse.log \
-C css.sms.rse_pl011_uart.unbuffered_output=1 \
-C css.pl011_uart_ap.uart_enable=1 \
-C css.pl011_uart_ap.out_file=/mnt/wd10t/saiph/lumex/run-scripts/tc4/logs/buildroot/2025_11_17_06_31_下午/uart_ap_non_secure.log \
-C css.pl011_uart_ap.unbuffered_output=1 \
-C css.pl011_uart1_ap.uart_enable=1 \
-C css.pl011_uart1_ap.out_file=/mnt/wd10t/saiph/lumex/run-scripts/tc4/logs/buildroot/2025_11_17_06_31_下午/uart1_ap_secure.log \
-C css.pl011_uart1_ap.unbuffered_output=1 \
-C displayController=2 \
-C css.sms.rse.rom.raw_image=./run-scripts/tc4/../../output/tc4/buildroot/fvp/swr/deploy//rse_rom.bin \
-C css.sms.rse.VMADDRWIDTH=16 \
-C css.sms.rse.intchecker.ICBC_RESET_VALUE=0x0000011B \
-C css.sms.rse.sic.SIC_AUTH_ENABLE=1 \
-C css.sms.rse.sic.SIC_DECRYPT_ENABLE=1 \
--data css.sms.rse.sram0=./run-scripts/tc4/../../output/tc4/buildroot/fvp/swr/deploy//rse_combined_provisioning_message.bin@0x400 \
-C css.cluster0.subcluster0.has_ete=1 \
-C css.cluster0.subcluster1.has_ete=1 \
-C css.cluster0.subcluster2.has_ete=1 \
-C css.cluster0.NUM_CMES=2 \
-C css.smmu.list_of_s_sid_high_at_bitpos0=0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 \
-C css.smmu.list_of_ns_sid_high_at_bitpos0=0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0 \
-C css.cache_state_modelled=1 \
-C css.nci_data.mcn0.cache_state_modelled=1 \
-C css.nci_data.mcn1.cache_state_modelled=1 \
-C css.nci_data.mcn2.cache_state_modelled=1 \
-C css.nci_data.mcn3.cache_state_modelled=1 \
-C css.nci_data.mcn4.cache_state_modelled=1 \
-C css.nci_data.mcn5.cache_state_modelled=1 \
-C css.nci_data.mcn6.cache_state_modelled=1 \
-C css.nci_data.mcn7.cache_state_modelled=1 \
-C cpnss.ros.hostbridge.interfaceName=tap0 \
-C cpnss.ros.smsc_91c111.enabled=1 \
--data board.dram=./run-scripts/tc4/../../output/tc4/buildroot/fvp/swr/deploy//tc-fitImage.bin@0x20000000 \

But the fvp still report below error and the system could boot up ok.

Error: TC4: Incompatible Cache Configuration
Cache state modelling is off in TC4.css.nci_data.mcn0.system_level_cache.cache
Cache state modelling is on in TC4.css.cluster0.DSU.shared_cache
In file: (unknown):0
Error: TC4: Incompatible Cache Configuration
Cache state modelling is off in TC4.css.nci_data.mcn1.system_level_cache.cache
Cache state modelling is on in TC4.css.cluster0.DSU.shared_cache