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I am seeking assistance on the Arm forum to understand how the 1-bit ACTIVE signal in the Arm® Power Policy Unit Architecture Specification corresponds to different power modes, as mentioned in section 3.3.2 Q-Channel PPU Power Modes Transitions. This section discusses various transitions between power modes, but given that the ACTIVE terminal of the Q-channel interface is a 1-bit signal, how does it map to different power modes?
Any insights or explanations on this matter would be greatly appreciated. Thank you.
This is described below Figure 3-2 in the Power Policy Unit Architecture Specification
"Although multiple power modes are supported with a Q-Channel PPU it only transitions between ON and the power mode programmed in the PPU_PWPR register"
If QACTIVE is asserted, that indicates the device needs to be in the ON state. If it is deasserted, then moving to the Q_STOPPED state will mean it takes the power value programmed in the PPU_PWPR register