Support forums

SoC Design and Simulation forum For PWAKEUP signal, it is specified that "If a completer clock is gated independently of the requester clock and PWAKEUP is used to enable the completer clock, there is a possibility that the setup phase of a transfer is missed by the completer&

State Suggested Answer
Locked Locked
Replies 1 reply
Answers 1 answer
Subscribers 91 subscribers
Views 1498 views
Users 0 members are here

Options

How was your experience today?

This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

For PWAKEUP signal, it is specified that "If a completer clock is gated independently of the requester clock and PWAKEUP is used to enable the completer clock, there is a possibility that the setup phase of a transfer is missed by the completer&

Ravi Kothiya over 1 year ago

Like they have specified the scenario but there is not any kind of further information in specification like whether we have to accept such transfers as valid or not?

Also Why there is no mention of PWAKEUP signal in FSM State even if it is an important signal for APB5 perspective.

Top replies

Christopher Tory 10 months ago +1 suggested

Ravi Kothiya said: Like they have specified the scenario but there is not any kind of further information in specification like whether we have to accept such transfers as valid or not? Yes, these transfers...