I saw 'Is HREADY an input or an output on slaves?'.
"Any AHB ("AMBA 2 AHB" or "AMBA 3 AHB-lite" or "AMBA 5 AHB") slave must have HREADY as both an input and an output port (not bi-directional).
HREADY is required as an output from a slave so that the slave can extend the data phase of a transfer.
HREADY is also required as an input so that the slave can determine when the previously selected slave has completed its final transfer and the first data phase transfer for this slave is about to commence.
Each AHB Slave should have an HREADY output signal (conventionally named HREADYOUT) which is connected to the "Slave-to-Master Multiplexer". The output of this multiplexer is the global HREADY signal seen by the AHB master, which is also fed back to all slaves as their HREADY input.
For single AHB slave buses this "Slave-to-Master Multiplexer" is replaced by direct connections, so HREADYOUT from the slave drives the AHB master's HREADY input, and is also fed back to the slave's HREADY input."
I can't clearly understand about "HREADY is also required as an input so that the slave can determine when the previously selected slave has completed its final transfer and the first data phase transfer for this slave is about to commence".
Assumming 1 master(M0) and 3 slaves(S0,S1,S2), if M0 and S0 is doing transaction and M0 requested to S2, is it right S2 is determining another transaction is working by HREADY input?
Is there other reason of HREADY input?
If my assumming is right, I think HTRANS is also common signal and other slaves can determining transaction by HTRANS signal.
I want exact reason of HREADY input in AHB Slave and if you give example I will appreciate about it
The slave will know it is the last transfer to the other slave because HSEL to this new slave will now be high, telling it that the new "address phase" transfer information is for it, and it should sample that "address phase" request when HREADY is driven high by the previous slave completing its final "data phase" data transfer.
After this point the new slave is now "data phase" active and will be driving the HREADYOUT value that the master will be sampling (and which all other slaves will see).