How to get GDS from an ARM IP (eg. SSE-200)

I'm new to the community and need to understand the flow to generate GDS2. 

There are ARM IPs available like Corstone-201 which is a bundle of sub-system IPs (like SSE-200 , etc.). This has docs, Synthesizable Verilog RTL. 

What I'm aware is that RTL can be used by Cadence, Synopsys to get the GDS2 but unclear on the steps and correct flow.

If someone could guide the process and help in understanding!