I am running an N1 core based full system fastmodel simulation. I am facing few issues in reading CMN700 register from my baremetal arm64 program. I am documenting the questions here:
1. CMN700.lisa uses the mesh_config_file param to pass on the yml file for topology. Is there any param to pass the memory map which is available in xml format so that the fastmodel can understand the CMN700 registers map?
2. The ARM baremetal program is trying to read a CMN700 register. Unfortunately, I am facing following 2 issues:
24 clk cluster0.cpu0 MR4 00000004042d1d80:0004042d1d80 Device-nGnRnE (StronglyOrdered) 0000000324 clk cluster0.cpu0 R X6 000000000000000324 clk cluster0.cpu0 BR4D_PS O____S I____S 00 0004042d1d80 DECERR 24 clk cluster0.cpu0 cmn700.cmn600_cache.downstream[5].pvbusmaster R4D_PS O____S I____S 00 0004042d1d80 DECERR 24 clk cluster0.cpu0 SalinaSoC.dec_cmn700apb_buslog R4D_PS O____S I____S 00 0000042d1d80 SLVERR 24 clk cluster0.cpu0 SalinaSoC.ni700_dec_buslog R4D_PS O____S I____S 00 0004042d1d80 SLVERR
CMN700 is setup in my lisa file as follows:
cmn700: CMN700( cache_state_modelled = true, rnf_sci_enable = "0xffff", // Enable sci for cluster 0 to 7 use_yml_periphbase = true, enable_logger = true, //register_traces_for_ccg_apb_accesses = true, print_cmn_config = true, //yml_has_node_addresses = true, //rnf_index_to_nodeid = "0x0=0x80", mesh_config_file.default = "cmn700_nxc_topology.yml" );
Thanks, Toshi. Let me follow up with "Support" system!