For AXI3 outstanding transactions with different IDs, can WID be sent in different order of AWID?
For example, two write transactions with ID 0 and ID1 and the burst length is 4.
AW channel: AWID0, AWID1
W channel: WID1_0, WID1_1, WID1_2, WID1_3, WID0_0, WID0_1, WID0_2, WID0_3
Maybe to your first question, but no to your example.
Interleaving allows you to send WID transfers for a number of outstanding AW transfers, BUT....
...the AXI3 spec described the following (seen in all AXI spec releases up to and including version F)...
"For a slave that supports write data interleaving, the order that it receives the first data item of each transaction must be the same as the order that it receives the addresses for the transactions."
So you can have interleaved write data transfers (with different IDs), and they can complete out of order such that a later issued AW transfer can see the WLAST transfer before WLAST for an earlier issued AW transfer, BUT the first W channel transfers must follow in the order the AW transfers were issued (not as in your example).
You could change your example to have the following W channel line, and this time it is legal...
W channel: WID0_0, WID0_1, WID1_0, WID0_2, WID1_1, WID1_2, WID1_3, WID0_3
The WID1_0 transfer can only appear some time after the WID0_0 transfer (first data requirement).
WID1_3 can complete before WID0_3, which is the "out of order" completion.
Thanks for clearing my confusion.
Can I say out of order transaction is based on data interleaving?
Without data interleaving support, all data items must be in the order of the address for the transactions.
With data interleaving support, write data interleaving imposes an additional constraint with different IDs that "the order that it receives the first data item of each transaction must be the same as the order that it receives the addresses for the transactions" like the example you provided above.
With data inteleaving support, read data channel could be in any order with different IDs.AR channel: ARID0, ARID1R channel: RID1_0, RID1_1, RID1_2, RID1_3, RID0_0, RID0_1, RID0_2, RID0_3R channel: RID1_0, RID0_0, RID1_1, RID1_2, RID0_1, RID1_3, RID0_2, RID0_3
Not quite. You can have "out of order" completion of write transactions without "interleaving". You could have all the W channel transfers performed in order (no interleaving), but the B channel responses returned out of order, so that would still be an out of order write transaction completion.
But without interleaving support, all W data transfers must be in the order the AW transfers were sent.
But I wouldn't spend too much time looking at write data interleaving as it was only in the AXI3 protocol, and the newer AXI4 and AXI5 protocols do not support write data interleaving.
For read data interleaving, yes, there is no "first data" restriction like there is for the AXI3 write transactions, so the R channel transfers (using different IDs) can start and end in any order. Both your read examples are perfectly valid.
Thanks for clear explanations.