Per CHI spec, "Device" memory type transactions start from start_address to aligned_address + number_bytes - 1
Say start_address is 0x70 and number_bytes is 64 Bytes.
Here, since its a "Device" memory type, byte access will be from 0x70 to 0x7F which is 16 Bytes.
How will the remaining 48 Bytes be accessed ?
In "Normal" memory type txn's, this is not an issue as addr wraps around to 0x40 after reaching 0x7F to provide remaining 48 bytes access's.