Axi master initiating the incr transfer of length let's say 15 means there is total 15 write transfer are there of 4 byte on 32 bit data bus.
So now does AXI slave update the memory just after getting each transfer or only after getting 15 transfer?
As I said in my last message, the protocol does not define when the slave updates the memory, all the protocol defines is how the data is passed to the slave.
Both the options you describe are possible, so use whichever one works best for your application. Buffering the 15 transfers before writing to the memory might give you better performance if the memory is burst aware, but at a cost of additional buffering gates in the slave interface design.