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Hi ARM experts,
Before posting , i went through
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500d/DDI0500D_cortex_a53_r0p2_trm.pdf
6.7: - Direct access to internal memory
Objective: - I want to read entire I-cache and D-cache from Software.
Statement: - "The Cortex-A53 processor provides a mechanism to read the internal memory used by the Cache and TLB structures through IMPLEMENTATION-DEFINED system registers".
notes: - The above statement in the TRM pdf says mechanism to read memory used by Cache.
questions: -
[1] I assume that the statement meant Cache memory itself not other memory?
[2] Is there any example code, as to read the I or D-cache using the registers?
[3] If reading is possible, how to lock I and D-Cache state from further Caching operations and then read it?
Thanks