Hi all,
I have two A15 CPUs and 1GByte of DRAM memory. I want to dedicate 0.5GByte of memory to each CPU. Would the following system work?
(A15) (A15)
| |
----CCI-----
|
SMMU
DMC
The SMMU will map the addresses coming from the first A15 (0-0.5GB) to the first half portion of the DRAM memory (0-0.5GB) and the addresses coming from the second A15 (0-0.5GB) to the second half of the DRAM memory (0.5GB-1GB). Moreover, the SMMU will provide protection allowing each CPU to access only its portion of memory.
Iakovos
Hi Lakovos,
System MMU should be ideally placed as close to the master initiator as possible I.e before any interconnect which usually separates the SMMU from the DMC. The most popular component to connect above the DMC and after the interconnect is the TZC-400 TrustZone address space controller. I am replying while andynightingale is traveling - please let me know if that answers your question.